RAPTM Processor Block Diagram

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AlphaIC’s RAPTM architecture consists of multiple RAPTM agents and each agent has one scalar processor, multiple tensor processors and dedicated on-chip memory. The scalar processor interacts with the host processor via AXI interfaces. Scalar processors fetch the instructions, decode it and offload the AI specific operations to the Tensor Processors. Tensor processors contain specialized compute logic for matrix multiply, activations and pooling. The architecture tightly couples agent and memory thus resulting in high performance AI operations