Job Description

  • Will work with system architects to understand the functional and performance requirements of a unit or feature.
  • Define micro-architecture and develop RTL for owned unit and/or feature.
  • Responsible for IP / sub-system level micro-architecture development and RTL coding.
  • Prepare block/sub-system level timing constraints.
  • Integrate IP/sub-system.
  • Work with verification and physical design team to ensure that the unit or feature is accurately verified and implemented.
  • Silicon bring-up in conjunction with post silicon validation and SW teams.

 

Minimum Qualifications and Requirements

  • BS / MS or equivalent experience with 5+ years of minimum experience but ideally need 10+ years of experience.
  • Proven knowledge in implementation of complex features or units.
  • Expertise in RTL coding using Verilog or System Verilog.
  • Expertise in using design and verification tools (Synthesis, lint, Xcelium or equivalent simulation tools, debug tools etc.).
  • Experience in AI architecture, AXI,  LPDDR and PCIe protocols are desirable and major plus2.
  • Good debugging and problem solving skills. Scripting knowledge.
  • Good interpersonal skills and ability & desire to work as a teammate are a huge plus

Apply For RTL Designer

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